Docea Power was founded in 2006 to develop software applications for Electronic System Level (ESL) design that secure and optimize the power and thermal specifications of electronic circuits. Docea recently received $1.5M in first round funding from Rhône-Alpes Création, Alps Development Sustainable Investment, Siparex, Octalfa, and private investors. Additional capital requirements are not currently planned. The company has 15 employees.

Power and thermal effects in a SoC come from digital blocks, memories and analog blocks, and depend on power reduction techniques, how the application software runs, and technology data. At this level of complexity, the only way architects can understand their design is to adopt a higher level of abstraction than RTL.

Docea develops solutions for analyzing and optimizing energy and thermal behaviors while taking into account the power consumption-temperature interdependence very early in the design cycle.

Docea claims to provide the first ESL solution, based on the Aceplorer platform for modeling, simulating and optimizing power and thermal behavior of any electronic system, either on-chip, on-board or with multiple boards. Thanks to early decisions and predictions in the design flow, power saving can reach 70-90% at the Electronic System Level versus 10-25% later at layout.

Aceplorer (ACE for Abstract Concept of Energy) is claimed to be the first solution to take into account the interdependence of power consumption and dissipation at the system level and offers a complete methodology for the exploration of architectural choices and optimization of power and thermal behaviors of electronic systems very early in the design project.

The Aceplorer model is a common XML-based description for capturing power behavior from informal requirements, even if the sources are heterogeneous (spreadsheet, datasheet, specification, IP-XACT description and library), allowing users to secure power specification and manage power intents at any stage of the design flow. Aceplorer automatically generates power intents according to the UPF (Unified Power Format) description.

A proprietary fast electro-thermal dynamic simulator enables power and temperature computing in a single tool. This simulator takes into account static and dynamic IR-drop, DVFS (dynamic voltage-frequency scaling), and power/temperature coupling.

Thermal modeling is based on a Dynamic Thermal Compact Model (DCTM) generated by proprietary mathematical algorithms. Package and environment thermal behavior are represented by a network of thermal resistors and capacitances. Users can build their own thermal model (in a Spice format) or run a dedicated tool that is currently provided as a DOCEA Power service.

Once all the models are generated, users can build an entire system model and execute the power and/or thermal exploration. The DCTM approach allows designers to execute a thermal simulation in only 0.1 sec. while controlling accuracy compared to 4 hours with a finite-element method (FEM) based thermal simulation.

In less than a few minutes, ACEplorer can deliver precise simulation results for many scenarios and variants, enabling system designers and architects to choose with more confidence the best options for IP, hardware/software partitioning, cost and power consumption. ACEplorer goes beyond the aspect of pure power, taking into account information about bandwidth, frequency, CPU load and temperature.

The ACEplorer platform also separates the architectural structural description and application use cases, which improves the reuse of power and thermal models. ACEplorer allows several design teams to work in parallel and succeed in formalizing a structured power aspect for every architect and designer.

Future plans include Aceplorer 2.0 and AcePowerModeler 1.0, a power model generator.

The Docea solutions are the result of R&D conducted in partnership with international research centers (IMEC, CEA-Leti, Verimag, G2Elab) and industrial partnerships.

The target market size is $ 250M, according to Docea. The primary competition is internal solutions based on complex Excel spreadsheets. Docea’s solutions step in at an early stage of a project where up to 70% of power consumption can be saved. Its solution combines power consumption and heat dissipation whereas several tools have been required up to now.

ACEplorer is used by system and specification engineers as well as software and hardware developers for mobile applications, telecom, gaming, automotive, consumer, medical and military systems. Aceplorer has been adopted by well known American and European semiconductor manufacturers and is deployed in production, by manufacturers developing ICs for mobile applications. ST-Ericsson is deploying ACEplorer to improve architectural-level power choices for SoC and platform design. Docea also has another undisclosed top 5 IC semiconductor company as a customer.

Ghislain Kaiser, Co-founder & CEO (previously worked for STMicroelectronics as senior system architect on wireless applications and before that as project leader for the set-top box division)

Sylvian Kaiser, Co-founder & CTO (previously worked at Infineon then TTPCom)

Stéphane Guédon, Ph.D., Engineering Manager (previously software manager at

Snaketech, which was acquired by Simplex/Cadence, and co-founder and Director of R&D at edXact)

Ridha Hamza, Sales and Marketing Director (previously spent two years at Yole Développement where he was in charge of EDA and emerging MEMS market research and analysis)