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Andes Technology -- Embedded 32-bit CPU & MCU IP Cores  
 
Founded: Mar 2005
Status: Private
Source: Semiconductor Times, 8/13
www.andestech.com
2F, No.1, Li-Hsin First Road, Science-Based Industrial Park
Hsin-Chu City,
Taiwan
Tel: +886-3-6668300
Fax: +886-3-6668322

Andes Technology was founded in March 2005 in Hsinchu Taiwan to develop embedded 32-bit CPU & MCU IP cores. The company focuses on embedded low power CPU IP and subsystems technology, business and service. In Q1’13, Andes announced plans to expand business and technical support to include U.S. semiconductor companies. Andes has roughly 100 employees.

Based on the patented 16/32-bit AndeStar instruction set architecture (ISA), Andes offers a series of embedded processor core families, namely AndesCore, in the form of hardcores, pre-configured softcores, and configurable softcores to address diversified application requirements. Andes launched its first 32-bit embedded processor core, AndesCore N1213, in 2008.

The AndeStar instruction set includes 16-bit and 32-bit mixed-length instructions to achieve optimal system performance, code density and power efficiency. The AndeStar ISA has evolved from the V1 architecture to the recently introduced V3 architecture, demonstrating continuous investment in a complete technology roadmap. The ISA is designed for all-C embedded programming.

The V3 architecture is backward compatible to V2 and adds 38 new instructions with rich semantics for further code size reduction and performance enhancement. The V3m version is a subset of V3 to enable smaller and lower power AndesCore. DSP and Saturation instructions are designed for DSP processing, audio codec and voice applications. Other options include FP coprocessor instructions and user-defined coprocessor extensions. The system architecture includes interrupts, exceptions, processes and memory management, providing flexible configurations for bare machines, RTOS, and Linux.

AndesCore is available in various configurations, ranging from the N7 to the N12 to hit various price/power/performance requirements. Depending on the version, features include 3 to 8 stage pipeline, static and dynamic branch prediction, MMU, co-processor interface, DMA support, and L2 cache.

The small gate count and high power efficiency AndesCore N7 and N8 families are designed to replace 8/16-bit MCUs for consumer applications. The AndesCore SN8 family with secure features is designed for smart card and secure card applications. The N9 family is suitable for the embedded controller market such as automotive control and storage. The rich multimedia functions and low-power features make the N10 family ideal for portable multimedia applications. The high performance N12 and N13 families are designed to address performance requirements for markets such as Linux-based home entertainment, digital set top box, networking, and mobile internet device.

Andes most recent product is the AndesCore N7 ultra power-efficient 32-bit processor series, codenamed “Hummingbird,” due to its compact size and energy efficiency. By implementing the latest AndeStar V3m architecture in a 2-stage pipeline, the N7 is the most power-efficient member of the Andes family. The N7 was created for SOC designs that have performance constrained by ultra-low energy consumption and small size.

The N7 delivers 108 DMIPS/mW, which is 30% higher than products from other companies, according to Andes. It also incorporates new mechanisms that accelerate applications that utilize higher latency flash memory, which improves memory access efficiency. The size of the AndesCore N7 can be as small as 12K gates, which makes it an alternative to 8051 and other 8-bit processor cores.

The AndesCore N801 is a fully-synthesizable softcore featuring a compact 3-stage pipeline, and takes less than 14k logic gates for the minimal configuration. It delivers over a 100MHz clock rate using a 0.18um process and over 300 MHz in a 90nm process, reaching performance efficiency up to 1.22 DMIPS/MHz.

The N903-S features a 5-stage pipeline and static branch prediction. The synthesizable softcore uses 40k to 80K logic gates from minimal to full configuration. It clocks at over 200MHz in a 0.13um process and over 300MHz in a 90nm process, reaching performance efficiency up to 1.53 DMIPS/MHz.

All IP cores are supported with a complete software development environment and libraries. For development support, Andes offers the AndeShape hardware development platform, AndeSight IDE, and AndeSoft Software Stacks. Andes provides a rich set of target software, from OS/RTOS to application libraries and middleware, running on AndesCore processors. Andes also offers companion IP, including FPUs, Interrupt Controllers, L2 Cache Controller, and full Platform IP. The company has an ecosystem with over 60 partners.

The market for 32-bit embedded CPU IP is roughly $900M, including license fees, production royalties, service and support fees, and development platforms fees. Andes argues that its processors outperform comparable processors from competitors in terms of performance, power consumption and die size. As an example, the N705, using standard TSMC libraries, delivers higher performance and power efficiency than the Cortex-M0+, according to Andes, and the N968A is more efficient, faster, lower power, and smaller than the Coretex-M3 or ARM7EJ-S.

The company has more than 60 commercial license agreements from companies including Alcor Micro, Chesen Electronics, eGalax eMPIA Technology, ENE, FiberHome Technologies Group, Himax Technologies, Hycon, ILITEK, Innostor, ITE, Lionic, Magic Control Technology, mCore Technology, MediaTek, Metanoia, Phison, Pixart, Ralink, Suzhou Smartek, Taifatech, UltraChip, VATICS, and Weltrend. Accumulated shipments of Andes Embedded SoCs have surpassed 200M units. The development environment has more than 5,000 installations with more than 7,000 engineers and researchers trained.

The MediaTek MT6628Q, which integrates WLAN, Bluetooth, GPS and FM in a single chip, integrates the Andes N903. Based on a multi-use license agreement for the N801-S, Hycon Technology has launched its 24-bit analog-to-digital converter. NAND flash controller IC design company Solid State System (3S) will soon roll out USB 3.0 products using the N903.

Frankwell Lin, Co-founder & President (previously a VP at Faraday, and Chairman of the Taiwan Embedded Industry Alliance)

5201 Great America Pkwy., Suite 320
Santa Clara, CA 95054
Tel: 408.730.6840




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