Intento Design was founded in spring 2015 to provide responsive technology for analog IP. The company has raised 900,000 Euros in early stage funding from Seventure Partners, a leading European Venture Capital Fund Manager, and the FOREIS Endowment Fund. Intento plans to raise an additional 2 million euros during the next 18 months. The company has 9 employees.
The company offers a design methodology and tools that accelerate the design and technology migration of analog and mixed-signal ICs. By adding a level of automation to the analog design process, the Intento Design methodology frees design teams to focus on SoC innovation while achieving compressed time to market windows.
The company was born from 25 years of research aimed at developing a new analog design methodology at Laboratoire d’Informatique de Paris 6 (LIP6) at Université Pierre et Marie Curie (UPMC) in Paris, France. The research resulted in an extensive portfolio of IP, including an EDA tool that accelerates the design cycle by automating the sizing and migration of analog and mixed-signal circuitry used in complex SoCs.
According to Intento, there is currently no available EDA tool that automates the sizing and migration of analog IP. Traditionally, analog and mixed-signal design requires engineers to compute initial circuit dimensions from hand analysis using first order transistor models followed by successive simulations. This tedious and time-consuming process can take weeks for a complex circuit.
The Intento Design methodology solves the analog design productivity gap by reducing lengthy simulation iterations. Intento accelerates this process with software that plugs into existing design flows and standard tools, and automates circuit sizing, allowing designers to move on to layout, placement and routing in a fraction of the time traditionally required. The Intento Design methodology keeps the designer at the center of the process, specifying the parameters that must be met by the circuit; reviewing the options based on desired power consumption, performance and surface area; and selecting the optimal solution.
The Methodology is based on the ID-Xplore tool, which reduces the latency of circuit sizing by automating the analog design process from hand analysis to simulation. Using ID-Xplore, designers input the desired parameters of even the most complex analog functions, and explore schematic options to achieve the right balance of performance, power consumption and robustness. Intento technology can reduce the number of simulator calls for hierarchical designs by 5X to 100X.
Intento is engaging with partners and early customers now to integrate ID-Xplore into their design flow. The company is working with key academic and industry partners to integrate ID-Xplore into proven and highly relied upon design environments. Intento anticipates announcing a key partnership with an industry leading EDA supplier prior to DAC. The company will further develop ID-Xplore for a full product launch in spring 2016, followed by an expansion of its tools to support additional features for debug and technology migration.
Ramy Iskander, CEO (previously held engineering roles at Digitaltest GmbH in Germany and Mentor Graphics in the US, and a research professor at the University Pierre and Marie Curie)
Farakh Javid, Founder & CTO (previously served on the design automation team at the University Pierre and Marie Curie under the guidance of Ramy Iskander)
Hervé Guegan, Board Member (previously held design, application engineering and management positions at companies including Thales and Mentor Graphics)
Eric Laurent, Global Sales Representative (previously held sales and management roles with Menta SAS, Space CoDesign, Arteris, TI, Daisy, ViewLogic, InnovEDA and Magma Design)